Osman Ulaş Şahin
The Design Of A High Frequency Pulse Width Modulation Integrated Circuit With External Synchronization Capability
The Pulse Width Modulation (PWM) has been playing an active role in circuits and systems for many years. The PWM is an irreplaceable part of the switch-mode power supplies (SMPS) and the class D power amplifiers (PA). The high frequency PWM operation is the key for having more compact SMPSs and class D PAs since it provides size reduction of the passive components, which dominates the size and the cost of these circuits. The digital implementation of the high frequency PWM inherently suffers from the lack of resolution, which leads to a performance degradation. On the other hand, the implementation of the PWM in the analog domain offers infinite resolution by its nature. This thesis presents the design and implementation of an analog high frequency PWM integrated circuit (IC), which is fabricated in a commercial 0.35 Ám CMOS process. The implemented PWM IC employs the natural sampling based PWM generation instead of the uniform sampling method for better spectral response. Taking a coding signal and a digital clock as inputs, the PWM IC creates the PWM signal and its complement, which may be required for some systems (e.g. SMPSs and class D PAs). The external clock-controlled architecture of the PWM IC brings many features and capabilities. Using this external clock, the PWM IC generates an analog triangle wave so that it provides higher resolution and less quantization error compared to the digital implementations, where step-wise approximation of a triangle wave is used. The selection of the triangle wave as the carrier signal offers lower harmonic distortion compared to the saw-tooth wave. The PWM IC eliminates the frequency error since the frequency of the PWM is directly set by the external clock signal. Besides, the external clock-controlled architecture allows the modulation frequency to be user adjustable, where it can be increased up to 5 MHz, for this implementation. The external clock-controlled architecture of the PWM IC allows multiple chips to be synchronized. This feature enables the use of the presented PWM IC in phased-array systems. The experimental results show that the timing error of the generated triangle wave is 800 ps in a synchronized operation. In addition, the time delay between the modulated AC signals at the output of the synchronized PWM ICs is limited to 4.8 ns when identical AC input signals with the frequency of up to 500 kHz are applied to the multiple PWM ICs. The PWM IC works with a single supply voltage of 5 V while consuming 20 mW of DC power. The full-chip area is 1.8 mm x 1.4 mm including the pad frame. The fabricated IC is protected against electro-static discharge (ESD) with an expected level of Class 2A.
Assist. Prof. Dr. Fatih Koçer
Defence date:
2017-02-28 13:30:00